Type
IPUH6N03LB
OptiMOS®2 Power-Transistor
IPSH6N03LB
Product Summary
Package
Marking
• Qualified according to JEDEC1) for target applications
V DS
30
V
R DS(on),max
6.3
mΩ
ID
50
A
• N-channel - Logic level
• Excellent gate charge x R DS(on) product (FOM)
• Superior thermal resistance
• 175 °C operating temperature
• Pb-free lead plating; RoHS compliant
Type
IPUH6N03LB
IPSH6N03LB
Package
PG-TO251-3
PG-TO251-3-11
Marking
H6N03LB
H6N03LB
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Continuous drain current
ID
Value
T C=25 °C2)
50
T C=100 °C
50
Pulsed drain current
I D,pulse
T C=25 °C3)
200
Avalanche energy, single pulse
E AS
I D=50 A, R GS=25 Ω
160
Reverse diode dv /dt
dv /dt
I D=50 A, V DS=20 V,
di /dt =200 A/µs,
T j,max=175 °C
6
Gate source voltage4)
V GS
Power dissipation
P tot
Operating and storage temperature
T j, T stg
T C=25 °C
IEC climatic category; DIN IEC 68-1
1)
Rev. 0.5
Unit
A
mJ
kV/µs
±20
V
83
W
-55 ... 175
°C
55/175/56
J-STD20 and JESD22
page 1
2008-04-14
IPUH6N03LB
Parameter
IPSH6N03LB
Values
Symbol Conditions
Unit
min.
typ.
max.
-
-
1.8
minimal footprint
-
-
62
6 cm2 cooling area5)
-
-
40
30
-
-
Thermal characteristics
Thermal resistance, junction - case
R thJC
SMD version, device on PCB
R thJA
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D=1 mA
Gate threshold voltage
V GS(th)
V DS=V GS, I D=40 µA
1.2
1.6
2
Zero gate voltage drain current
I DSS
V DS=30 V, V GS=0 V,
T j=25 °C
-
0.1
1
V DS=30 V, V GS=0 V,
T j=125 °C
-
10
100
I GSS
V GS=20 V, V DS=0 V
-
10
100
nA
R DS(on)
V GS=4.5 V, I D=30 A
-
7.4
9.3
mΩ
V GS=10 V, I D=50 A
-
5.2
6.3
-
1.2
-
Ω
39
78
-
S
Gate-source leakage current
Gate resistance
RG
Transconductance
g fs
|V DS|>2|I D|R DS(on)max,
I D=50 A
2)
Current is limited by bondwire; with an R thJC=1.8 K/W the chip is able to carry 86 A.
3)
See figure 3
4)
T j,max=150 °C and duty cycle D
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